Embedded Systems & Firmware Engineer

Yunzhe Deng

Preferred name: Mark

Embedded Systems · Firmware · Robotics · FPGA

I build low-level hardware/software systems across embedded firmware, robotics, PCB bring-up, and digital hardware.

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Portrait of Yunzhe Deng

Featured Projects

Primary hardware and embedded systems work across PCB bring-up, digital hardware, and robotics.

Embedded poker assistant cover showing LCD controller, custom PCB, camera setup, and poker dashboard

01 / Embedded Systems + PCB

Custom Embedded PCB & Firmware

Designed, fabricated, assembled, and brought up a custom SiWG917 embedded PCB for a connected poker-assistant system, then integrated firmware, MQTT communication, and LCD/joystick UI paths while validating power subsystems on the bench.

Altium Designer · SiWG917 · PCB Design · JLCPCB · Hardware Bring-Up

View ProjectDemo

02 / Digital Hardware

Pipelined RV32IM Processor with AXI4-Lite Memory

Six-stage RV32IM processor in SystemVerilog with AXI4-Lite-style instruction/data memory interfaces, forwarding, hazard control, branch flushing, load-use stalls, and pipelined division.

SystemVerilog · RV32IM · AXI4-Lite · Forwarding · Verification

64 / 64

functional verification

20.55 MHz

reported Fmax

View ProjectGitHub

Six-stage RV32IM pipeline

F/G/D/X/M/W with an added instruction-response stage for AXI4-Lite-style fetch latency.

F
Fetch
stage 1
G
Response
stage 2
D
Decode
stage 3
X
Execute
stage 4
M
Memory
stage 5
W
Writeback
stage 6
Forwarding + load-use stalls
Branch/jump flush
64 / 64 verification artifact
Final soft tentacle robot with LCD emotion display and ultrasonic sensor

03 / Embedded Robotics

Interactive Soft Tentacle Robot with Ultrasonic-Aware Embedded Control

Interactive 3D-printed soft tentacle robot using ATmega328PB firmware, ultrasonic-aware LCD emotion behavior, joystick ADC control, and PCA9685-driven three-servo tendon actuation.

ATmega328PB · Ultrasonic · ADC · PCA9685 · SPI LCD

Ultrasonic sensing → relative-motion classification → LCD emotion states.

Joystick ADC → direction/bending mapping → PCA9685 → three-servo tentacle motion.

View ProjectDemo

Software & Machine Learning

Software engineering, workflow automation, and applied machine learning.

Streamlit dashboard for the local-first job application assistant

01 / Software Engineering

Job Application Assistant

Built a local-first Python and Streamlit workflow for discovering, ranking, tracking, and preparing technical job applications, with SQLite persistence, deterministic matching, CLI workflows, and optional browser-assisted autofill.

Python · Streamlit · SQLite · CLI · Playwright

Local-first

workflow

SQLite

application queue

Browser-assisted

autofill planning

View ProjectGitHub Repository

Headline-only source classification

The model sees cleaned headline-like text, not domains, article bodies, or source metadata.

01
URL slugs
FOX / NBC article paths
02
Pseudo-headlines
domain and metadata removed
03
RoBERTa-base
binary sequence classifier
04
Evaluation
85.34% hidden-test accuracy
14,205 self-collected examples
PyTorch + Transformers
URL-slug preprocessing

02 / Machine Learning + NLP

Headline-Only News Source Classifier

Built and evaluated a headline-only FOX/NBC source classifier by fine-tuning RoBERTa-base on 14,205 URL-slug-derived examples, achieving 85.34% hidden-test accuracy in the course evaluation.

Python · PyTorch · RoBERTa · NLP · Transformers

14,205

self-collected examples

85.34%

hidden-test accuracy

View ProjectGitHub Repository

Research & Publication

ICCAD 2025 · Best Paper Candidate

COBRA: Algorithm-Architecture Co-optimized Binary Transformer Accelerator for Edge Inference

Co-author · RBMM Pipeline Contributor

Contributed to the pipelined execution of COBRA's RBMM (Real 1-bit Binary Matrix Multiplication) engine, enabling overlapped engine invocations with an initiation interval of one clock cycle within the larger FPGA accelerator design.

arXivDOI

Experience

July 2024 - August 2024

IC Test Engineer Intern

Simchip Technology / Shanghai, China

  • Built Vivado/Verilog FPGA screening testbenches that drove patterns and flagged four-channel IC outputs against a 3 V pass/fail threshold.
  • Designed the screening workflow to support 10,000+ units while refining threshold and debounce logic from oscilloscope and logic-analyzer captures.

June 2023 - September 2023

Junior Software Engineer Intern

Lenovo (Shanghai) Co., Ltd. / Shanghai, China

  • Built Python/MySQL tools for internal engineering-data validation, cleansing, categorization, and search.
  • Ran backend integration tests to check data consistency and workflow reliability.

About

My work focuses on embedded systems, firmware, robotic sensing, PCB bring-up, hardware/software integration, and low-level digital design.

Education

University of Pennsylvania

M.S.E. in Electrical Engineering

August 2025 - December 2026 / Philadelphia, Pennsylvania

University of California, Irvine

Bachelor of Science in Computer Engineering

September 2021 - March 2025 / Irvine, CA

Technical Areas

Embedded & Firmware

C/C++, Embedded C, Bare-metal C, FreeRTOS / CMSIS-RTOS2, RTOS tasks, Device drivers, Interrupts, SiWG917, ATmega328PB, STM32

Interfaces & Connectivity

SPI, I2C, UART, GPIO, PWM, ADC, Timers, MQTT / Wi-Fi, Sensor/display integration

Robotics

ROS 2, ROS Noetic, LiDAR, RealSense, Hokuyo LiDAR, SLAM, Obstacle avoidance, Sensor integration

FPGA & Digital Systems

SystemVerilog, Verilog, RTL design, RISC-V, AXI / AXI-Lite, Vivado, Vitis HLS, Yosys, nextpnr

Hardware / Debugging

Altium Designer, PCB design, Board bring-up, Schematic capture, PCB layout, Oscilloscope, Logic analyzer, Soldering/rework

Tools

Python, Linux, Git, SEGGER SystemView/RTT, Serial debugging, GDB, Simplicity Studio / WiseConnect SDK

Contact

Open to embedded systems, firmware, robotics, and hardware/software integration opportunities.

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